|System Verilog Catalyst program|
28th August 2005 - Ace Verification joins the System Verilog Catalyst program. With heightened interest in System Verilog, Ace Verification has expanded the Coverage Revealed training to provide guidance to design teams in how to utilize the capabilities of System Verilog to execute random coverage driven verification. Training is now available in both "e" and System Verilog.
For more information: Coverage Revealed
Design right. Verify right. Ace Verification
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